PoSyn: A Graphical Approach Towards Side-Channel Aware Synthesis
Jan 1, 2025·,
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0 min read
Amisha Srivastava
Samit Shahnawaz Miftah
James Hyunmin Kim
Debjit Pal
Kanad Basu
Abstract
PoSyn proposes a graphical approach towards side-channel aware synthesis, enabling designers to incorporate side-channel resistance directly into the synthesis flow. The method leverages graph-based representations to optimize circuits for both performance and security against power analysis attacks.
Type
Publication
IEEE Transactions on Very Large Scale Integration Systems (TVLSI)
Authors
James Hyunmin Kim
(he/him)
Senior SoC Architect & Hardware Security Expert
Ph.D. in Electrical Engineering from KU Leuven (imec-COSIC), with 15+ years of expertise
in secure SoC architecture, hardware security, and cryptographic implementations.
Specialized in ARM/RISC-V security subsystems, side-channel countermeasures, and
post-quantum cryptography. 4 silicon tape-outs, CAVP-certified security IPs.