Three Phase Dynamic Current Mode Logic: A More Secure DyCML to Achieve a More Balanced Power Consumption
Aug 1, 2012·
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0 min read
James Hyunmin Kim
Vladimir Rozic
Ingrid Verbauwhede
Abstract
This paper introduces Three Phase Dynamic Current Mode Logic (3P-DyCML), an enhanced version of DyCML that achieves more balanced power consumption through a three-phase evaluation scheme. The proposed design significantly reduces side-channel information leakage while maintaining practical performance characteristics.
Type
Publication
In Workshop on Information Security Applications (WISA 2012)
Authors
James Hyunmin Kim
(he/him)
Senior SoC Architect & Hardware Security Expert
Ph.D. in Electrical Engineering from KU Leuven (imec-COSIC), with 15+ years of expertise
in secure SoC architecture, hardware security, and cryptographic implementations.
Specialized in ARM/RISC-V security subsystems, side-channel countermeasures, and
post-quantum cryptography. 4 silicon tape-outs, CAVP-certified security IPs.