Binary Decision Diagram to Design Balanced Secure Logic Styles
Jul 1, 2016·
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0 min read
James Hyunmin Kim
Seokhie Hong
Bart Preneel
Ingrid Verbauwhede
Abstract
This paper proposes a Binary Decision Diagram (BDD)-based methodology for designing balanced secure logic styles resistant to side-channel attacks. The BDD approach enables systematic generation of dual-rail circuits with guaranteed balanced power consumption across all input transitions.
Type
Publication
In IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2016)
Authors
James Hyunmin Kim
(he/him)
Senior SoC Architect & Hardware Security Expert
Ph.D. in Electrical Engineering from KU Leuven (imec-COSIC), with 15+ years of expertise
in secure SoC architecture, hardware security, and cryptographic implementations.
Specialized in ARM/RISC-V security subsystems, side-channel countermeasures, and
post-quantum cryptography. 4 silicon tape-outs, CAVP-certified security IPs.