SMART DShot: Secure Machine-Learning-Based Adaptive Real-Time Timing Correction
ML-powered bidirectional DShot protocol with FPGA-based neural network for real-time ESC timing correction.
PoSyn: A Graphical Approach Towards Side-Channel Aware Synthesis
Graphical approach for integrating side-channel resistance into the hardware synthesis flow.
amisha-srivastava
Mutual Information Analysis for Three-Phase Dynamic Current Mode Logic against Side-Channel Attack
Mutual information analysis evaluating three-phase dynamic current mode logic against side-channel attacks.